
arprcver:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400700 <_init>:
  400700:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400704:	910003fd 	mov	x29, sp
  400708:	94000058 	bl	400868 <call_weak_fn>
  40070c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400710:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400720 <.plt>:
  400720:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400724:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf318>
  400728:	f947fe11 	ldr	x17, [x16, #4088]
  40072c:	913fe210 	add	x16, x16, #0xff8
  400730:	d61f0220 	br	x17
  400734:	d503201f 	nop
  400738:	d503201f 	nop
  40073c:	d503201f 	nop

0000000000400740 <exit@plt>:
  400740:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400744:	f9400211 	ldr	x17, [x16]
  400748:	91000210 	add	x16, x16, #0x0
  40074c:	d61f0220 	br	x17

0000000000400750 <perror@plt>:
  400750:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400754:	f9400611 	ldr	x17, [x16, #8]
  400758:	91002210 	add	x16, x16, #0x8
  40075c:	d61f0220 	br	x17

0000000000400760 <bind@plt>:
  400760:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400764:	f9400a11 	ldr	x17, [x16, #16]
  400768:	91004210 	add	x16, x16, #0x10
  40076c:	d61f0220 	br	x17

0000000000400770 <recvfrom@plt>:
  400770:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400774:	f9400e11 	ldr	x17, [x16, #24]
  400778:	91006210 	add	x16, x16, #0x18
  40077c:	d61f0220 	br	x17

0000000000400780 <__libc_start_main@plt>:
  400780:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400784:	f9401211 	ldr	x17, [x16, #32]
  400788:	91008210 	add	x16, x16, #0x20
  40078c:	d61f0220 	br	x17

0000000000400790 <memset@plt>:
  400790:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400794:	f9401611 	ldr	x17, [x16, #40]
  400798:	9100a210 	add	x16, x16, #0x28
  40079c:	d61f0220 	br	x17

00000000004007a0 <htons@plt>:
  4007a0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007a4:	f9401a11 	ldr	x17, [x16, #48]
  4007a8:	9100c210 	add	x16, x16, #0x30
  4007ac:	d61f0220 	br	x17

00000000004007b0 <bzero@plt>:
  4007b0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007b4:	f9401e11 	ldr	x17, [x16, #56]
  4007b8:	9100e210 	add	x16, x16, #0x38
  4007bc:	d61f0220 	br	x17

00000000004007c0 <__gmon_start__@plt>:
  4007c0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007c4:	f9402211 	ldr	x17, [x16, #64]
  4007c8:	91010210 	add	x16, x16, #0x40
  4007cc:	d61f0220 	br	x17

00000000004007d0 <abort@plt>:
  4007d0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007d4:	f9402611 	ldr	x17, [x16, #72]
  4007d8:	91012210 	add	x16, x16, #0x48
  4007dc:	d61f0220 	br	x17

00000000004007e0 <socket@plt>:
  4007e0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007e4:	f9402a11 	ldr	x17, [x16, #80]
  4007e8:	91014210 	add	x16, x16, #0x50
  4007ec:	d61f0220 	br	x17

00000000004007f0 <strcpy@plt>:
  4007f0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4007f4:	f9402e11 	ldr	x17, [x16, #88]
  4007f8:	91016210 	add	x16, x16, #0x58
  4007fc:	d61f0220 	br	x17

0000000000400800 <printf@plt>:
  400800:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400804:	f9403211 	ldr	x17, [x16, #96]
  400808:	91018210 	add	x16, x16, #0x60
  40080c:	d61f0220 	br	x17

0000000000400810 <ioctl@plt>:
  400810:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400814:	f9403611 	ldr	x17, [x16, #104]
  400818:	9101a210 	add	x16, x16, #0x68
  40081c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400820 <_start>:
  400820:	d280001d 	mov	x29, #0x0                   	// #0
  400824:	d280001e 	mov	x30, #0x0                   	// #0
  400828:	aa0003e5 	mov	x5, x0
  40082c:	f94003e1 	ldr	x1, [sp]
  400830:	910023e2 	add	x2, sp, #0x8
  400834:	910003e6 	mov	x6, sp
  400838:	580000c0 	ldr	x0, 400850 <_start+0x30>
  40083c:	580000e3 	ldr	x3, 400858 <_start+0x38>
  400840:	58000104 	ldr	x4, 400860 <_start+0x40>
  400844:	97ffffcf 	bl	400780 <__libc_start_main@plt>
  400848:	97ffffe2 	bl	4007d0 <abort@plt>
  40084c:	00000000 	.inst	0x00000000 ; undefined
  400850:	0040091c 	.word	0x0040091c
  400854:	00000000 	.word	0x00000000
  400858:	00400b88 	.word	0x00400b88
  40085c:	00000000 	.word	0x00000000
  400860:	00400c08 	.word	0x00400c08
  400864:	00000000 	.word	0x00000000

0000000000400868 <call_weak_fn>:
  400868:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf318>
  40086c:	f947f000 	ldr	x0, [x0, #4064]
  400870:	b4000040 	cbz	x0, 400878 <call_weak_fn+0x10>
  400874:	17ffffd3 	b	4007c0 <__gmon_start__@plt>
  400878:	d65f03c0 	ret
  40087c:	00000000 	.inst	0x00000000 ; undefined

0000000000400880 <deregister_tm_clones>:
  400880:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400884:	91020000 	add	x0, x0, #0x80
  400888:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  40088c:	91020021 	add	x1, x1, #0x80
  400890:	eb00003f 	cmp	x1, x0
  400894:	540000a0 	b.eq	4008a8 <deregister_tm_clones+0x28>  // b.none
  400898:	90000001 	adrp	x1, 400000 <_init-0x700>
  40089c:	f9461421 	ldr	x1, [x1, #3112]
  4008a0:	b4000041 	cbz	x1, 4008a8 <deregister_tm_clones+0x28>
  4008a4:	d61f0020 	br	x1
  4008a8:	d65f03c0 	ret
  4008ac:	d503201f 	nop

00000000004008b0 <register_tm_clones>:
  4008b0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4008b4:	91020000 	add	x0, x0, #0x80
  4008b8:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  4008bc:	91020021 	add	x1, x1, #0x80
  4008c0:	cb000021 	sub	x1, x1, x0
  4008c4:	9343fc21 	asr	x1, x1, #3
  4008c8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4008cc:	9341fc21 	asr	x1, x1, #1
  4008d0:	b40000a1 	cbz	x1, 4008e4 <register_tm_clones+0x34>
  4008d4:	90000002 	adrp	x2, 400000 <_init-0x700>
  4008d8:	f9461842 	ldr	x2, [x2, #3120]
  4008dc:	b4000042 	cbz	x2, 4008e4 <register_tm_clones+0x34>
  4008e0:	d61f0040 	br	x2
  4008e4:	d65f03c0 	ret

00000000004008e8 <__do_global_dtors_aux>:
  4008e8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008ec:	910003fd 	mov	x29, sp
  4008f0:	f9000bf3 	str	x19, [sp, #16]
  4008f4:	b0000093 	adrp	x19, 411000 <exit@GLIBC_2.17>
  4008f8:	39420260 	ldrb	w0, [x19, #128]
  4008fc:	35000080 	cbnz	w0, 40090c <__do_global_dtors_aux+0x24>
  400900:	97ffffe0 	bl	400880 <deregister_tm_clones>
  400904:	52800020 	mov	w0, #0x1                   	// #1
  400908:	39020260 	strb	w0, [x19, #128]
  40090c:	f9400bf3 	ldr	x19, [sp, #16]
  400910:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400914:	d65f03c0 	ret

0000000000400918 <frame_dummy>:
  400918:	17ffffe6 	b	4008b0 <register_tm_clones>

000000000040091c <main>:
  40091c:	d11a03ff 	sub	sp, sp, #0x680
  400920:	a9007bfd 	stp	x29, x30, [sp]
  400924:	910003fd 	mov	x29, sp
  400928:	b9001fa0 	str	w0, [x29, #28]
  40092c:	f9000ba1 	str	x1, [x29, #16]
  400930:	9101c3a0 	add	x0, x29, #0x70
  400934:	d280bd41 	mov	x1, #0x5ea                 	// #1514
  400938:	aa0103e2 	mov	x2, x1
  40093c:	52800001 	mov	w1, #0x0                   	// #0
  400940:	97ffff94 	bl	400790 <memset@plt>
  400944:	b9002bbf 	str	wzr, [x29, #40]
  400948:	79005bbf 	strh	wzr, [x29, #44]
  40094c:	b9401fa0 	ldr	w0, [x29, #28]
  400950:	7100081f 	cmp	w0, #0x2
  400954:	54000100 	b.eq	400974 <main+0x58>  // b.none
  400958:	f9400ba0 	ldr	x0, [x29, #16]
  40095c:	f9400001 	ldr	x1, [x0]
  400960:	90000000 	adrp	x0, 400000 <_init-0x700>
  400964:	9130e000 	add	x0, x0, #0xc38
  400968:	97ffffa6 	bl	400800 <printf@plt>
  40096c:	52800020 	mov	w0, #0x1                   	// #1
  400970:	97ffff74 	bl	400740 <exit@plt>
  400974:	528100c0 	mov	w0, #0x806                 	// #2054
  400978:	97ffff8a 	bl	4007a0 <htons@plt>
  40097c:	12003c00 	and	w0, w0, #0xffff
  400980:	2a0003e2 	mov	w2, w0
  400984:	52800061 	mov	w1, #0x3                   	// #3
  400988:	52800220 	mov	w0, #0x11                  	// #17
  40098c:	97ffff95 	bl	4007e0 <socket@plt>
  400990:	b9067ba0 	str	w0, [x29, #1656]
  400994:	b9467ba0 	ldr	w0, [x29, #1656]
  400998:	7100001f 	cmp	w0, #0x0
  40099c:	540000ca 	b.ge	4009b4 <main+0x98>  // b.tcont
  4009a0:	90000000 	adrp	x0, 400000 <_init-0x700>
  4009a4:	91314000 	add	x0, x0, #0xc50
  4009a8:	97ffff6a 	bl	400750 <perror@plt>
  4009ac:	52800020 	mov	w0, #0x1                   	// #1
  4009b0:	97ffff64 	bl	400740 <exit@plt>
  4009b4:	910163a0 	add	x0, x29, #0x58
  4009b8:	d2800281 	mov	x1, #0x14                  	// #20
  4009bc:	97ffff7d 	bl	4007b0 <bzero@plt>
  4009c0:	9100c3a0 	add	x0, x29, #0x30
  4009c4:	d2800501 	mov	x1, #0x28                  	// #40
  4009c8:	97ffff7a 	bl	4007b0 <bzero@plt>
  4009cc:	f9400ba0 	ldr	x0, [x29, #16]
  4009d0:	91002000 	add	x0, x0, #0x8
  4009d4:	f9400001 	ldr	x1, [x0]
  4009d8:	9100c3a0 	add	x0, x29, #0x30
  4009dc:	97ffff85 	bl	4007f0 <strcpy@plt>
  4009e0:	9100c3a0 	add	x0, x29, #0x30
  4009e4:	aa0003e2 	mov	x2, x0
  4009e8:	d2912661 	mov	x1, #0x8933                	// #35123
  4009ec:	b9467ba0 	ldr	w0, [x29, #1656]
  4009f0:	97ffff88 	bl	400810 <ioctl@plt>
  4009f4:	3100041f 	cmn	w0, #0x1
  4009f8:	540000c1 	b.ne	400a10 <main+0xf4>  // b.any
  4009fc:	90000000 	adrp	x0, 400000 <_init-0x700>
  400a00:	91318000 	add	x0, x0, #0xc60
  400a04:	97ffff53 	bl	400750 <perror@plt>
  400a08:	52800020 	mov	w0, #0x1                   	// #1
  400a0c:	97ffff4d 	bl	400740 <exit@plt>
  400a10:	b94043a0 	ldr	w0, [x29, #64]
  400a14:	b9005fa0 	str	w0, [x29, #92]
  400a18:	b94043a1 	ldr	w1, [x29, #64]
  400a1c:	90000000 	adrp	x0, 400000 <_init-0x700>
  400a20:	9131e000 	add	x0, x0, #0xc78
  400a24:	97ffff77 	bl	400800 <printf@plt>
  400a28:	9100c3a0 	add	x0, x29, #0x30
  400a2c:	aa0003e2 	mov	x2, x0
  400a30:	d29124e1 	mov	x1, #0x8927                	// #35111
  400a34:	b9467ba0 	ldr	w0, [x29, #1656]
  400a38:	97ffff76 	bl	400810 <ioctl@plt>
  400a3c:	3100041f 	cmn	w0, #0x1
  400a40:	540000c1 	b.ne	400a58 <main+0x13c>  // b.any
  400a44:	90000000 	adrp	x0, 400000 <_init-0x700>
  400a48:	91324000 	add	x0, x0, #0xc90
  400a4c:	97ffff41 	bl	400750 <perror@plt>
  400a50:	52800020 	mov	w0, #0x1                   	// #1
  400a54:	97ffff3b 	bl	400740 <exit@plt>
  400a58:	9100a3a0 	add	x0, x29, #0x28
  400a5c:	91010ba1 	add	x1, x29, #0x42
  400a60:	b9400022 	ldr	w2, [x1]
  400a64:	b9000002 	str	w2, [x0]
  400a68:	b8402021 	ldur	w1, [x1, #2]
  400a6c:	b8002001 	stur	w1, [x0, #2]
  400a70:	3940a3a0 	ldrb	w0, [x29, #40]
  400a74:	2a0003e1 	mov	w1, w0
  400a78:	3940a7a0 	ldrb	w0, [x29, #41]
  400a7c:	2a0003e2 	mov	w2, w0
  400a80:	3940aba0 	ldrb	w0, [x29, #42]
  400a84:	2a0003e3 	mov	w3, w0
  400a88:	3940afa0 	ldrb	w0, [x29, #43]
  400a8c:	2a0003e4 	mov	w4, w0
  400a90:	3940b3a0 	ldrb	w0, [x29, #44]
  400a94:	2a0003e5 	mov	w5, w0
  400a98:	3940b7a0 	ldrb	w0, [x29, #45]
  400a9c:	2a0003e6 	mov	w6, w0
  400aa0:	90000000 	adrp	x0, 400000 <_init-0x700>
  400aa4:	9132a000 	add	x0, x0, #0xca8
  400aa8:	97ffff56 	bl	400800 <printf@plt>
  400aac:	52800220 	mov	w0, #0x11                  	// #17
  400ab0:	7900b3a0 	strh	w0, [x29, #88]
  400ab4:	528100c0 	mov	w0, #0x806                 	// #2054
  400ab8:	97ffff3a 	bl	4007a0 <htons@plt>
  400abc:	12003c00 	and	w0, w0, #0xffff
  400ac0:	7900b7a0 	strh	w0, [x29, #90]
  400ac4:	52800020 	mov	w0, #0x1                   	// #1
  400ac8:	7900c3a0 	strh	w0, [x29, #96]
  400acc:	39018bbf 	strb	wzr, [x29, #98]
  400ad0:	528000c0 	mov	w0, #0x6                   	// #6
  400ad4:	39018fa0 	strb	w0, [x29, #99]
  400ad8:	910193a0 	add	x0, x29, #0x64
  400adc:	9100a3a1 	add	x1, x29, #0x28
  400ae0:	b9400022 	ldr	w2, [x1]
  400ae4:	b9000002 	str	w2, [x0]
  400ae8:	b8402021 	ldur	w1, [x1, #2]
  400aec:	b8002001 	stur	w1, [x0, #2]
  400af0:	910163a0 	add	x0, x29, #0x58
  400af4:	52800202 	mov	w2, #0x10                  	// #16
  400af8:	aa0003e1 	mov	x1, x0
  400afc:	b9467ba0 	ldr	w0, [x29, #1656]
  400b00:	97ffff18 	bl	400760 <bind@plt>
  400b04:	9101c3a0 	add	x0, x29, #0x70
  400b08:	d280bd42 	mov	x2, #0x5ea                 	// #1514
  400b0c:	52800001 	mov	w1, #0x0                   	// #0
  400b10:	97ffff20 	bl	400790 <memset@plt>
  400b14:	9101c3a0 	add	x0, x29, #0x70
  400b18:	d2800005 	mov	x5, #0x0                   	// #0
  400b1c:	d2800004 	mov	x4, #0x0                   	// #0
  400b20:	52800003 	mov	w3, #0x0                   	// #0
  400b24:	d280bd42 	mov	x2, #0x5ea                 	// #1514
  400b28:	aa0003e1 	mov	x1, x0
  400b2c:	b9467ba0 	ldr	w0, [x29, #1656]
  400b30:	97ffff10 	bl	400770 <recvfrom@plt>
  400b34:	b90677a0 	str	w0, [x29, #1652]
  400b38:	9101c3a0 	add	x0, x29, #0x70
  400b3c:	f90337a0 	str	x0, [x29, #1640]
  400b40:	9101c3a0 	add	x0, x29, #0x70
  400b44:	91003800 	add	x0, x0, #0xe
  400b48:	f90333a0 	str	x0, [x29, #1632]
  400b4c:	90000000 	adrp	x0, 400000 <_init-0x700>
  400b50:	91334000 	add	x0, x0, #0xcd0
  400b54:	97ffff2b 	bl	400800 <printf@plt>
  400b58:	b9067fbf 	str	wzr, [x29, #1660]
  400b5c:	f94337a1 	ldr	x1, [x29, #1640]
  400b60:	b9867fa0 	ldrsw	x0, [x29, #1660]
  400b64:	38606820 	ldrb	w0, [x1, x0]
  400b68:	2a0003e1 	mov	w1, w0
  400b6c:	90000000 	adrp	x0, 400000 <_init-0x700>
  400b70:	91338000 	add	x0, x0, #0xce0
  400b74:	97ffff23 	bl	400800 <printf@plt>
  400b78:	b9467fa0 	ldr	w0, [x29, #1660]
  400b7c:	11000400 	add	w0, w0, #0x1
  400b80:	b9067fa0 	str	w0, [x29, #1660]
  400b84:	17fffff6 	b	400b5c <main+0x240>

0000000000400b88 <__libc_csu_init>:
  400b88:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b8c:	910003fd 	mov	x29, sp
  400b90:	a901d7f4 	stp	x20, x21, [sp, #24]
  400b94:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf318>
  400b98:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf318>
  400b9c:	91374294 	add	x20, x20, #0xdd0
  400ba0:	913722b5 	add	x21, x21, #0xdc8
  400ba4:	a902dff6 	stp	x22, x23, [sp, #40]
  400ba8:	cb150294 	sub	x20, x20, x21
  400bac:	f9001ff8 	str	x24, [sp, #56]
  400bb0:	2a0003f6 	mov	w22, w0
  400bb4:	aa0103f7 	mov	x23, x1
  400bb8:	9343fe94 	asr	x20, x20, #3
  400bbc:	aa0203f8 	mov	x24, x2
  400bc0:	97fffed0 	bl	400700 <_init>
  400bc4:	b4000194 	cbz	x20, 400bf4 <__libc_csu_init+0x6c>
  400bc8:	f9000bb3 	str	x19, [x29, #16]
  400bcc:	d2800013 	mov	x19, #0x0                   	// #0
  400bd0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400bd4:	aa1803e2 	mov	x2, x24
  400bd8:	aa1703e1 	mov	x1, x23
  400bdc:	2a1603e0 	mov	w0, w22
  400be0:	91000673 	add	x19, x19, #0x1
  400be4:	d63f0060 	blr	x3
  400be8:	eb13029f 	cmp	x20, x19
  400bec:	54ffff21 	b.ne	400bd0 <__libc_csu_init+0x48>  // b.any
  400bf0:	f9400bb3 	ldr	x19, [x29, #16]
  400bf4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400bf8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400bfc:	f9401ff8 	ldr	x24, [sp, #56]
  400c00:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c04:	d65f03c0 	ret

0000000000400c08 <__libc_csu_fini>:
  400c08:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400c0c <_fini>:
  400c0c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400c10:	910003fd 	mov	x29, sp
  400c14:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400c18:	d65f03c0 	ret
